Design of Cntfet Based Ternary 2x2 Sram Memory Array for Low Power Application

In this paper, we have design of ternary 2x2 Sram memory Array using carbon Nano-tube field-effect transistors (CNTFETs).the CNTFET technology has new parameters and characteristics which determine the performances such as current driving capability, speed, power consumption and area of circuits have been proposed for ternary 2x2 Sram memory array is needed to optimize performance using CNTFET technology. The CNTFET used for design has different charity vector and threshold voltages of CNTFET transistor can be controlled by controlling the chirality vector. The channel length used here is 32nm wide. The power consumption is reduce compare to CMOS technology Second order effects are removed by using CNTFET. In a 3 Value Logic also Trivalent, Ternary, Trinary Logic, or Trilean sometimes abbreviated 3VL), it only takes 0, 1/2,1 bits to represent a binary number. In 3Value logic 6T 2x2 memory cell based CNTFET have been developed and extensive HSPICE simulations have been performed. The CNTFET based 3 value logic 6T ternary 2x2 SRAM array demonstrates that it provides low power dissipation and propagation delay which is better than CMOS 6T 2x2 SRAM array.